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TSMC will starting full EUV lithography of 5 nanometer chips April 2019

•, brian wang

The foundry's update showed that area and power gains continue in its leading-edge nodes, but chip speeds are no longer advancing at their historic rate. To compensate, TSMC gave an update on a half-dozen packaging techniques that it is developing to speed connections between chips.

The TSMC N7+ node that can use EUV on up to four layers. Its N5 that will use EUV on up to 14 layers will be ready for risk production in April. EUV aims to lower costs by reducing the number of masks required for leading-edge designs.

Samsung is ramping a 7-nm node using EUV. Intel is not expected to use EUV anytime soon. Globalfoundries announced in August that it has halted work on 7 nm and EUV.

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